Systems and methods for tia base current detection and compensation

ABSTRACT

Described herein are systems and methods that can adjust the performance of a transimpedance amplifier (TIA) in order to compensate for changing environmental and/or manufacturing conditions. In some embodiments, the changing environmental and/or manufacturing conditions may cause a reduction in beta of a bipolar junction transistor (BJT) in the TIA. A low beta may result in a high base current for the BJT causing the output voltage of the TIA to be formatted as an unusable signal output. To compensate for the low beta, the TIA generates an intermediate signal voltage, based on the base current and beta that is compared with the PN junction bias voltage on another BJT. Based on the comparison, the state of a digital state machine may be incremented, and a threshold base current is determined. This threshold base current may decide whether to compensate the operation of the TIA, or discard the chip.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation of and claims priority to U.S. patentapplication Ser. No. 16/181,523, titled “SYSTEMS AND METHODS FOR TIABASE CURRENT DETECTION AND COMPENSATION” and filed on Nov. 6, 2018(Attorney Docket No. VLI-023), which is hereby incorporated by referenceherein in its entirety.

TECHNICAL FIELD

The present disclosure relates generally to systems and methods fortransimpedance amplifier (TIA), and more particularly to detect a basecurrent of a bipolar junction transistor (BJT) in a TIA and to adjustthe TIA operation to compensate for changing environmental and/ormanufacturing conditions.

BACKGROUND

A transimpedance amplifier (TIA) may convert an input current sourceinto an output voltage. The current to voltage gain may be based on afeedback resistance. A TIA may provide simple linear signal processingusing an operational amplifier and a feedback resistor for dissipatingcurrent. The circuit may be able to maintain a constant voltage biasacross the input source as the input current changes, which may bebeneficial in a network of sensors. Transimpedance amplifiers may beused to process the current output of photodiodes, pressure transducers,accelerometers, and other types of sensors to a voltage formatted as auseable signal output. However, the performance of a TIA may benegatively impacted by 1) a change in environment, e.g. temperature, and2) silicon wafer manufacturing variations.

Accordingly, what are needed are systems and methods that may detectperformance deficiencies due the aforementioned conditions, and providea recommendation to select either to discard the TIA or to causeadjustments in the operation of the TIA to improve the performance ofthe TIA.

BRIEF DESCRIPTION OF THE DRAWINGS

References will be made to embodiments of the invention, examples ofwhich may be illustrated in the accompanying figures. These figures areintended to be illustrative, not limiting. Although the invention isgenerally described in the context of these embodiments, it should beunderstood that it is not intended to limit the scope of the inventionto these particular embodiments. Items in the figures are not to scale.

FIG. 1A illustrates a basic transimpedance amplifier circuit accordingto embodiments of the present document.

FIG. 1B illustrates a schematic of a npn bipolar junction transistors(BJT).

FIG. 1C illustrates a Gaussian distribution of the value of beta (β)according to embodiments of the present disclosure.

FIG. 2A depicts an implementation of TIA Base Current Detection andCompensation Functional Blocks according to embodiments of the presentdisclosure.

FIG. 2B illustrates conditions of operation of a TIA based on therelationship between intermediate signal, (voltageVF), and the impedanceof a load of TIA, ImpL.

FIG. 3 depicts an implementation of TIA Base Current Detection andCompensation Circuits according to embodiments of the presentdisclosure.

FIG. 4 graphically illustrates a flowchart of a method of calibration todetect and compensate for a high base current in a bipolar junctiontransistor (BJT) according to embodiments of the current disclosure.

DETAILED DESCRIPTION OF EMBODIMENTS

In the following description, for purposes of explanation, specificdetails are set forth in order to provide an understanding of theinvention. It will be apparent, however, to one skilled in the art thatthe invention can be practiced without these details. Furthermore, oneskilled in the art will recognize that embodiments of the presentinvention, described below, may be implemented in a variety of ways,such as a process, an apparatus, a system, a device, or a method on atangible computer-readable medium.

Components, or modules, shown in diagrams are illustrative of exemplaryembodiments of the invention and are meant to avoid obscuring theinvention. It shall also be understood that throughout this discussionthat components may be described as separate functional units, which maycomprise sub-units, but those skilled in the art will recognize thatvarious components, or portions thereof, may be divided into separatecomponents or may be integrated together, including integrated within asingle system or component. It should be noted that functions oroperations discussed herein may be implemented as components. Componentsmay be implemented in software, hardware, or a combination thereof.

Furthermore, connections between components or systems within thefigures are not intended to be limited to direct connections. Rather,data between these components may be modified, re-formatted, orotherwise changed by intermediary components. Also, additional or fewerconnections may be used. It shall also be noted that the terms“coupled,” “connected,” or “communicatively coupled” shall be understoodto include direct connections, indirect connections through one or moreintermediary devices, and wireless connections.

Reference in the specification to “one embodiment,” “preferredembodiment,” “an embodiment,” or “embodiments” means that a particularfeature, structure, characteristic, or function described in connectionwith the embodiment is included in at least one embodiment of theinvention and may be in more than one embodiment. Also, the appearancesof the above-noted phrases in various places in the specification arenot necessarily all referring to the same embodiment or embodiments.

The use of certain terms in various places in the specification is forillustration and should not be construed as limiting. A service,function, or resource is not limited to a single service, function, orresource; usage of these terms may refer to a grouping of relatedservices, functions, or resources, which may be distributed oraggregated.

The terms “include,” “including,” “comprise,” and “comprising” shall beunderstood to be open terms and any lists the follow are examples andnot meant to be limited to the listed items. Any headings used hereinare for organizational purposes only and shall not be used to limit thescope of the description or the claims. Each reference mentioned in thispatent document is incorporate by reference herein in its entirety.

Furthermore, one skilled in the art shall recognize that: (1) certainsteps may optionally be performed; (2) steps may not be limited to thespecific order set forth herein; (3) certain steps may be performed indifferent orders; and (4) certain steps may be done concurrently.

A. Transimpedance Amplifier (TIA) and Bipolar Junction Transistors (BJT)

A transimpedance amplifier (TIA) may convert current to voltage. TIAsmay be used to process the current output of photodiodes, pressuretransducers, accelerometers, and other types of sensors to a voltageformatted as a useable signal output. TIAs provide linear signalprocessing using an operational amplifier and a feedback resistor fordissipating current. FIG. 1A shows a basic transimpedance amplifiercircuit 100.

In FIG. 1A, I_(in) represents the current output from a sensor and thegain (sensitivity) is resistance, R. Using Kirchhoff's Current Law(KCL), the sum of all currents flowing into a node is zero. If oneassumes that the current flowing into the op amp is ib, KCL at node N1provides an equation:

I _(in)+((Vout−V _(n1))/R)−ib=0,

as noted in FIG. 1A. The equation provides a voltage output,Vout=R(ib−I_(in))+V_(n1).

Bipolar Junction Transistor (BJT) is a semiconductor device constructedwith three doped Semiconductor Regions (Base, Collector and Emitter)separated by two p-n Junctions. The p-n junction between the Base andthe Emitter has a Barrier Voltage (V_(o)) of about 0.6 V to 0.8 V. FIG.1B illustrates BJT 120 of a npn BJT. As illustrated in FIG. 1B,V_(o)=VBE. A companion BJT has a pnp structure.

Per FIG. 1B, the current flowing out of BJT 120, emitter current ie, isequal to the currents flowing into BJT 120, collector current ic andbase current ib; thus the equation: ie=ic+ib. The current gain, or beta,of BJT 120 is equal to the ratio: ic divided by ib (ic/ib). In someembodiments, with a load resistance connected in series with thecollector, the current gain (beta) of the common emitter transistorconfiguration may be quite large. Small changes in current flowing inthe base of BJT 120 control the current in the emitter-collectorcircuit. In some embodiments, beta may have a value between 20 and 200for general purpose transistors.

The value of beta may vary depending on changes in environment, e.g. 1)temperature, and 2) silicon wafer manufacturing variations. FIG. 1Cillustrates a Gaussian distribution of the value of beta 140, accordingto embodiments of the present disclosure. One sample of the Gaussiandistribution is Beta1, which is associated with transistor BJT1. Beta1represents a nominal value of beta as it has a maximum number of samplesfor a particular value of beta. Another sample of the Gaussiandistribution is associated with transistor BJT2, which has a beta with avalue of Beta2. Beta2 has a lower number of samples of a particularvalue of beta as compared with Beta1 and represents a reduced value ofbeta, or a “low beta”. In some embodiments, since ic is designed to be aconstant current, with the lower value of beta (Beta2), the transistorBJT2 may generate a higher value of ib as compared with transistor BJT1since ic is essentially constant. A decision may be made to discardtransistor BJT2 or adjust the TIA to compensate for the higher value ofib.

In another embodiment, a sample of the Gaussian distribution of FIG. 1Cis Beta3, which is associated with transistor BJT3. Beta3 has a highernumber of samples for a particular value of beta as compared with Beta1,and represents an increased value of beta, or a “high beta”. Since ic isgenerally designed to be a constant current, with the higher value ofBeta3, transistor BJT3 may generate a lower value of ib as compared withtransistor BJT1, which has a beta of Beta1.

B. TIA Base Current Detection and Compensation Functional Blocks

FIG. 2A depicts TIA Base Current Detection and Compensation FunctionalBlocks 200, hereinafter, “Functional Blocks 200”, according toembodiments of the present disclosure. In operation, Vin 220 is coupledto TIA 204 that amplifies the input current and may generate thevoltage, Vout 222. Periodically, there may be a need to update the inputcurrent to adapt for changing environmental conditions. In this case,TIA 204 measures the status of its performance based on internallygenerated Intermediate Signal 226 having an associated voltage, VF.Voltage VF may indicate deficiencies requiring action. IntermediateSignal 226 (voltage VF) and a Reference 224 (voltage VR) are voltages,and are coupled to Comparator 210 via two corresponding low passfilters, LPF 206 and LPF 208 via Signal 228 and Signal 230. Voltage VRis associated with Reference 224. The output of Comparator 210, COMP_OUT232, may be coupled to Digital State Machine 212. Digital State Machine212, when triggered, increments the digital state from a current stateto a next state. An output of Digital State Machine 212, Digital State234, may reflect the state of Digital State Machine 212. In oneembodiment, Digital State Machine 212 may have 16 states.

If the voltage VF for Intermediate Signal 226 is greater than thevoltage VR of Reference 224, the output of Comparator 210 is a “1”,which triggers an increment from a current state to a next state inDigital State Machine 212. In one embodiment, the state may change fromState2 to State3. Digital State Machine 212 is coupled via Digital State234 to Current Digital-Analog-Converter (Current DAC) 202. Current DAC202 then converts the digital state, i.e., Digital State 234, to acurrent indicated by Current 236, which is the current output fromCurrent DAC 202 (The current of Currrent DAC 202 is referred to asidac). In other words, Current DAC 202 is a state machine controlled lownoise current DAC. In some embodiments, the change for State2 to State3causes an increased value of current for Current 236. Current 236 is inturn coupled to TIA 204. TIA 204 then responds to Current 236 andimplements another cycle of comparing voltage VF to voltage VR.

If the voltage VF for Intermediate Signal 226 is less than the voltageVR of Reference 224, the output of Comparator 210 maintains a value of“0”. In this case, the state of Digital State Machine 212 remains thesame, and there is no change in Current 236.

Functional Blocks 200 may be utilized in a calibration method in orderto detect performance deficiencies and provide a recommendation toselect either to discard the TIA or to cause adjustments in theoperation of the TIA to improve the performance. Performance may bebased on the relationship between a load in the TIA and the voltage VF,as discussed relative to FIG. 2B. Key elements in the calibration methodare the relationships between current idac, and voltages VF and VR. In abeginning state, idac=0, and VF>VR, causing an increment in the digitalcode of the state machine (Digital State Machine 234), which causes anincrease in idac. Based on the increased idac, the process may repeat.As idac increases, VF decreases. At some point VF<VR, causing the statemachine stop incrementing the digital code. At this point, TIA 204 maybe considered calibrated and the last digital code is recorded.

With the completion of calibration and the digital code of the statemachine recorded, the following decisions may be implemented: (1)compare the recoded digital code to a predetermined code to decidewhether to discard the TIA. The predetermined code may be based ondesign, simulation and expectation parameters. Or, 2) based on thecomparison of the recoded digital code to a predetermined code, proceedwith operation of the TIA. In this case, the adjusted digital code hascompensated for deficiencies in the operation.

An increase in VF may cause degradation in the performance of componentsof TIA 204. Specifically, the condition of VF being “close” to thesupply voltage Vcc may cause TIA 204 to be in a non-operating condition.FIG. 2B illustrates via embodiment 250 the conditions for operation ofTIA 204 based on the relationship between Intermediate Signal 226(voltage VF) and the impedance of a Load 203, ImpL, of TIA 204. Thevalue of the power supply voltage, Vcc and the value of VR are noted onFIG. 2B. As illustrated, at lower values of VF, ImpL is relativelyconstant, with minimal declines in the value of the impedance. At ahigher value of VF, for example, VF1, ImpL begins to rapidly decrease,significantly impacting the components and performance of TIA 204. Insome embodiments, VF1 may be 70% of Vcc, a power supply voltage for TIA204.

When VF increases to a value of VF2, TIA 204 may no longer beoperational. The voltage VF2 may be a pre-determined value based onImpL. This pre-determined value may be based on the design andcomponents of TIA 204. In some embodiments, this pre-determined value ofVF2 may be 50% of ImpL. That is, TIA 204 may no longer be operationalwhen ImpL has declined in value by 50%, as illustrated in FIG. 2B.

Alternatively, for pnp bipolar junction transistors, the condition ofthe value of VF being “low”, compared with Vcc may cause the TIA 204 tobe in a non-operating condition. In embodiment 250, VF5 illustrates a“low” condition. This condition may occur if VF5 is less than apre-determined value of Vcc. In some embodiments, pre-determined valueof VF5 may be 20%. That is, TIA 204 may be in a non-operating conditionwhen VF5 is 20% of Vcc.

In summary, an increase in VF (Intermediate Signal Voltage) relative tothe Load (ImpL) associated with a TIA, may cause a decrease in componentperformance of a TIA. As illustrated in embodiment 250, ImpL isrelatively constant at lower VF voltages. At voltage VF1, the ImpLbegins to rapidly decrease; at voltage VF2,TIA becomes non-operational;at voltage VF3, TIA is operational but with degraded performance; atvoltage VF4, TIA is operational with acceptable performance;VR=Reference Voltage; Vcc=power supply voltage. Voltage VF4 refers to arange of voltages below VF1. Voltage VF3 refers to a range of voltagesbetween VF1 and VF2. In sample embodiment 250, VF1=2.12 volts; VF2=2.4volts, VF3=2.3 volts, VF4=2.0 volts; VR=0.7 volts, Vcc=2.5 volts. Valuesare approximate.

As illustrated in embodiment 250, a TIA with an intermediate signalvoltage of VF3 is operational but with degraded performance. With acalibration method, the TIA can compensate for deficiencies in componentperformance and reduce the intermediate signal voltage to VF4 to obtainacceptable performance. In some embodiments with a BJT, the componentdeficiency may be a high beta.

C. TIA Base Current Detection and Compensation Circuit

FIG. 3 depicts TIA Base Current Detection and Compensation Circuits 300(hereinafter “Circuits 300”) according to embodiments of the presentdisclosure. FIG. 3 includes a BJT implementation of TIA 204 ofFunctional Blocks 200. Circuits 300 implements detection andcompensation of the TIA base current utilizing the properties of a BJT.The voltages, VBE1 and VBE2, are determined primarily by the P-Njunction of silicon, which is approximately 0.7 volts (barrier voltage).

Circuit 300 comprises Current DAC 302, TIA 304, Comparator 320, andDigital State Machine 322. TIA 304 comprises several componentsincluding two BJTs as illustrated in FIG. 3. One BJT is Q₁ 303, which iscoupled to a feedback resistor, R_(F) 310. Associated with thesecomponents are: ib1−base current of Q₁ 303; ibf−current through resistorR_(F); idac−current from Current DAC 302, where ib1=ibf+(idac).

An output of Current DAC 302 may be coupled to the base of Q₁ 303 and toone end of R_(F) 310. The collector of Q₁ 303 may be coupled to Load 307and Buffer 311. An output of Buffer 311 may be coupled to the other endof R_(F) 310, hence providing a feedback resistor for Q₁ 303. An outputof Buffer 311 is the Intermediate Signal 326 having an associatedvoltage, VF, where VF=VBE1+(ibf×R_(F)). Intermediate Signal 326 iscoupled via R₁ 312 to the base of Q2 305. The components Load 309,variable resistor, R₂ 314, and Buffer 311 collectively operate togenerate Vout, an output of the transimpedance amplifier.

Voltage VF and Voltage VR are separately coupled to Comparator 320,which in turn is coupled via COMP_OUT 332 to Digital State Machine 322,which in turn is coupled to Current DAC 302 via Digital State 334.Current DAC 302 generates idac, which is coupled to the base of Q1 303.The operation of Comparator 320, Digital State Machine 322, and CurrentDAC 302 are equivalent to the previously described operation ofComparator 210, Digital State Machine 212, and Current DAC 202 asprevious described for FIG. 2A. The inputs to Comparator 320 arefiltered by LPF 316 and LPF 318.

A goal for the operation of Circuits 300 is the detection of performancedeficiencies due to 1) a change in environment, e.g. temperature, and 2)silicon wafer manufacturing variations, and provide a recommendation toselect either to discard the TIA or to cause adjustments in theoperation of the TIA to achieve an acceptable performance. As previouslydiscussed relative to FIG. 2B, acceptable performance may be definedrelative to the relationship between a load of a TIA and theIntermediate Signal Voltage VF. A consideration for Circuits 300 is theneutralization of a “high” ibf current due to a “high” ib1 currentcaused due to low beta. The operation may be described as follows:

-   -   Ib1=ibf+idac    -   The base current, ib1 is dependent on beta of Q₁ 303, which may        vary with process and environment, as previously noted.        Beta=ic1/ib1    -   An intermediate signal voltage: VF=VBE1+(ibf×RF)    -   If the beta is low (decreased), a large base current, ib1, may        result, causing a large voltage drop across RF, and may place        TIA in a non-operating mode.    -   If ib1 is high (increased), the level of current “idac” required        to make ibf=0 may also be large.    -   When idac becomes equal to ib1, ibf becomes zero. Then, a        further increase in idac may cause ibf to become negative and        Comparator 320 will flip, i.e. transition from a “1” to a “0”        state. The “1” state may cause Digital State 322 to increment        Digital State 334, which in turn increases idac current. The “0”        state may cause Digital State 322 to not increment Digital State        334, which in turn results in no change in the idac current. The        status of Comparator 320 may be determined based on the value of        voltage VF relative to the value of voltage VBE2, where VBE2 is        primarily determined by the Barrier Voltage (V₀) of about 0.6 V        to 0.8 V.    -   Hence, the value of idac that causes the Comparator 320 to flip        or transition indicates a threshold base current. This threshold        base current, from the Current DAC 302, may be utilized to        decide to neutralize ibf or discard the chip.    -   Periodic calibration of Circuits 300 may be appropriate to        insure proper operation of the TIA. Changing environmental        conditions may cause the need for the calibration, which may        update the current level.

D. Methods

FIG. 4 graphically illustrates a flowchart 400 of a method ofcalibration to detect and compensate for a high base current in abipolar junction transistor (BJT) according to embodiments of thecurrent disclosure. The method may be referred to as a calibrationprocess and may be based on utilizing Circuits 300. . The methodcomprises the steps of:

Generating, by a current DAC 302, a DAC current (idac) based on a stateof a digital state machine 322 (step 402)

Generating, by a TIA, an intermediate signal voltage VF based on the DACcurrent, base current ib1 and a value of beta of a bipolar junctiontransistor Q₁ 303 of the TIA. (step 404)

Comparing, by Comparator 320, the intermediate signal voltage VF and aPN junction bias voltage. (step 406)

Is the intermediate signal voltage VF greater than the PN junction biasvoltage? (step 408)

If yes, the output of the comparator changes state, instructing adigital state machine to increment to a next digital code (or state ofDigital State Machine 212), causing the current DAC to increase its DACcurrent idac (step 410)

Then, repeating the generation of the intermediate signal voltage VFbased on the increased DAC current idac (step 412)

If no, the last digital code is recorded and compared with apre-determined digital code. Based on this comparison, a decision can bemade to 1) discard the TIA, or 2) continue operation with adjusted DACcurrent idac. (step 414)

As previously discussed for FIG. 2B, an increase in VF may causedegradation in the performance of components of TIA 204. Specifically,the condition of VF being “close” to the supply voltage Vcc may causeTIA 204 to be in a non-operating condition. FIG. 2B illustratesconditions for operation of TIA 204 based on the relationship betweenIntermediate Signal 226 VF and the impedance of a Load 203, ImpL, of TIA204. [move to summary?]

In summary, A system for detecting and adjusting the operation of a TIAcomprises (1) a current digital to analog converter (DAC) operable togenerate an idac current based on a first state level of a digital statemachine; (2) a transimpedance amplifier (TIA) operable to receive thecurrent and to generate an intermediate signal voltage (VF) and generatean output voltage (Vout); (3) a comparator operable to receive theintermediate signal voltage (VF) and a reference voltage and generate anoutput; and (4) the digital state machine operable to generate secondstate level based on the output of the comparator. The current DACchanges its idac generated current if there is a difference between thefirst state level and the second state level.

If the intermediate signal voltage is greater than the referencevoltage, the output of the comparator is a “1”, causing the digitalstate machine to increment the first state level to a higher level statefor the second state, in turn causing the current DAC to increase theidac current coupled to the TIA. If the intermediate signal voltage isless than the reference voltage, the output of the comparator is a “0”,causing no change in the state level of the digital state machine, andcausing no change to idac current coupled to the TIA. The referencevoltage is based on a barrier voltage of a bipolar junction transistor(BJT). The barrier voltage varies between 0.6 voltages and 0.8 voltages.

The TIA comprises a first bipolar junction transistor (BJT), and theintermediate signal voltage (VF) is based in part on the value of betaof the first BJT. A first base current (ib1) for the first BJT is equalto the current from the current DAC (idac) plus a feedback current (ibf)received via a feedback resistor, wherein the intermediate signalvoltage (VF) equals the barrier voltage plus the feedback current (ibf)times the resistance of the feedback resistor. When VF increases to apre-determine value, the impedance of the load of the TIA decreases,causing the TIA to no longer operate. If the digital state machineincrements to the higher level state, the idac current increases, andthe TIA repeats the generation of another value of the intermediatesignal voltage (VF) utilizing the increased idac current. If the digitalstate machine does not increment to a higher level state, a currentstate is recorded and compared with a pre-determined state, and wherein,based on the comparison, a decision is made to 1) discard the TIA, or 2)continue operation with last adjusted idac current. An operation statusof the TIA is based on a relationship between intermediate signalvoltage (VF) and an impedance of a load of the TIA, wherein an increasein intermediate signal voltage (VF) causes degradation in the operationstatus of the TIA.

A variation of a beta of the first BJT causes an inverse variation ofthe intermediate signal voltage that in turn causes a change in thefirst base current (ib1) for the first BJT, wherein the change in thefirst base current (ib1) compensates for the variation in the beta. Thereference voltage is based on the barrier voltage of a second BJT in theTIA. The current to voltage gain may be based on a feedback resistance.A goal for the operation of the system is the neutralization of a highibf current due to a large ib1 current.

A method for detecting and adjusting the operation of a TIA comprisesgenerating a DAC current by a current DAC and coupling the DAC currentto a transimpedance amplifier (TIA); generating, by the TIA, anintermediate signal voltage (VE) based on the DAC current, a basecurrent and a value of beta of a bipolar junction transistor of the TIA;comparing, by a comparator, the intermediate signal voltage (VF) and aPN junction bias voltage.

If the intermediate signal voltage is greater than the PN junction biasvoltage, the output of the comparator changes, instructing a digitalstate machine to increment to a next digital code, causing the currentDAC to increase its DAC current; and repeating the generation of theintermediate signal voltage (VF) based on the increased DAC current. Ifthe intermediate signal voltage (VF) is not greater than a PN junctionbias voltage, recording the last digital code and comparing the lastdigital code with a pre-determined digital code.

E. System Embodiments

It will be appreciated to those skilled in the art that the precedingexamples and embodiments are exemplary and not limiting to the scope ofthe present disclosure. It is intended that all permutations,enhancements, equivalents, combinations, and improvements thereto thatare apparent to those skilled in the art upon a reading of thespecification and a study of the drawings are included within the truespirit and scope of the present disclosure. It shall also be noted thatelements of any claims may be arranged differently including havingmultiple dependencies, configurations, and combinations.

What is claimed is:
 1. A system comprising: a current digital to analogconverter (DAC) operable to generate an idac current based on a firststate level of a digital state machine; a transimpedance amplifier (TIA)operable to receive the idac current and to generate an intermediatesignal voltage (VF) and generate an output voltage (Vout); a comparatoroperable to receive the intermediate signal voltage (VF) and a referencevoltage and generate an output; and the digital state machine operableto generate a second state level based on the output of the comparator,wherein, the current DAC changes its generated idac current if there isa difference between the first state level and the second state level.2. The system of claim 1, wherein if the intermediate signal voltage(VF) is greater than the reference voltage, the output of the comparatoris a “1”, causing the digital state machine to increment the first statelevel to a higher level state for the second state level, in turncausing the current DAC to increase the idac current.
 3. The system ofclaim 2, wherein if the digital state machine increments to the higherlevel state, the idac current increases, and the TIA repeats generationof another value of the intermediate signal voltage (VF) utilizing theincreased idac current.
 4. The system of claim 1, wherein if theintermediate signal voltage (VF) is less than the reference voltage, theoutput of the comparator is a “0”, causing no change in a state level ofthe digital state machine, and causing no change to idac current coupledto the TIA.
 5. The system of claim 4, wherein, if the digital statemachine does not increment to a higher level state, a current state isrecorded and compared with a pre-determined state, and wherein, based onthe comparison, a decision is made to 1) discard the TIA, or 2) continueoperation with last adjusted idac current.
 6. The system of claim 1,wherein the TIA comprises a first bipolar junction transistor (firstBJT), and the intermediate signal voltage (VF) is based in part on avalue of beta of the first BJT.
 7. The system of claim 6, wherein afirst base current (ib1) for the first BJT is equal to the current fromthe idac current plus a feedback current (ibf) received via a feedbackresistor, wherein the intermediate signal voltage (VF) equals a voltageVBE1, which is primarily based on a barrier voltage, plus the feedbackcurrent (ibf) times a resistance of the feedback resistor.
 8. The systemof claim 7, wherein a decrease in the value of beta of the first BJT,that causes an increase in the first base current (ib1), is neutralizedby incrementing a digital state of the digital state machine in order toincrease the idac current.
 9. The system of claim 7, wherein when theidac current equals the first base current (ib1), then the idac currentincreases in value to cause feedback current (ibf) to become negative,the comparator to transitions from a “1” to a “0”.
 10. The system ofclaim 6, wherein a variation of a beta of the first BJT causes aninverse variation of the intermediate signal voltage (VF) that in turncauses a change in a first base current (ib1) for the first BJT, whereinthe change in the first base current (ib1) compensates for the variationin the beta.
 11. The system of claim 6, wherein the value of beta mayvary depending on changes in environment, e.g. 1) temperature, and 2)silicon wafer manufacturing variations.
 12. The system of claim 1,wherein the reference voltage is based on a barrier voltage of a secondBJT in the TIA.
 13. The system of claim 1, wherein an operation statusof the TIA is based on a relationship between the intermediate signalvoltage (VF) and an impedance of a load of the TIA.
 14. The system ofclaim 13, wherein when VF increases to a pre-determine value, theimpedance of the load of the TIA decreases, causing the TIA to no longeroperate.
 15. A method comprising: generating a DAC current by a currentDAC and coupling the DAC current to a transimpedance amplifier (TIA);generating, by the TIA, an intermediate signal voltage (VF) based on theDAC current, a base current and a value of beta of a bipolar junctiontransistor of the TIA; comparing, by a comparator, the intermediatesignal voltage (VF) and a PN junction bias voltage; if the intermediatesignal voltage (VF) is greater than the PN junction bias voltage and anoutput of the comparator changes, instructing a digital state machine toincrement to a next digital code, causing the current DAC to increaseits DAC current; and repeating the generation of the intermediate signalvoltage (VF) based on the increased DAC current.
 16. The method of claim15, further comprising: if the intermediate signal voltage (VF) is notgreater than the PN junction bias voltage, recording the last digitalcode and comparing the last digital code with a pre-determined digitalcode.
 17. The method of claim 16, further comprising: based on thecomparison, deciding to 1) discard the TIA, or 2) continue operationwith adjusted DAC current idac.
 18. A system comprising: a currentdigital to analog converter (DAC) operable to generate an idac currentbased on a first state level of a digital state machine; atransimpedance amplifier (TIA) comprising a first bipolar junctiontransistor (BJT) having an associated load, and a second BJT, operableto receive the idac current and to generate an intermediate signalvoltage (VF) and generate an output voltage (Vout); a comparatoroperable to receive the intermediate signal voltage (VF) and a referencevoltage and generate an output; and the digital state machine operableto generate a second state level based on the output of the comparator,wherein, the current DAC changes its generated idac current if there isa difference between the first state level and the second state level.19. The system of claim 18, wherein when VF increases to a pre-determinevalue, an impedance of the associated load of the TIA decreases, causingthe TIA to no longer operate.
 20. The system of claim 18, wherein if theintermediate signal voltage (VF) is greater than the reference voltage,the output of the comparator is at a “STATE1”, causing the digital statemachine to increment the first state level to a higher level state forthe second state level, in turn causing the current DAC to increase theidac current, wherein if the intermediate signal voltage (VF) becomesless than the reference voltage, the output of the comparator is a“STATE2”, causing no change in a state level of the digital statemachine, and causing no change to idac current coupled to the TIA.